Microprocessor Enhancement Corp. v. Texas Instruments Inc.’s Empirical Analysis
520 F.3d 1367 · 2008
Citation profile
14 federal appellate · 12 district ·
How this case has been cited
Cited by 66 later decisions — most recently February 2023 · most notably Voda v. Cordis Corp. (2008), Katz v. American Airlines, Inc. (2011)
14 federal appellate · 12 district ·
Later decisions citing this case, by decade. The current decade is in progress, and our corpus holds fewer opinions from the most recent years, so the latest bars are undercounted — not a real decline.
Relationships
Applies 28 U.S.C. § 1295 · 35 U.S.C. § 112
Relies on Phillips v. AWH Corp. · Cybor Corporation v. Fas Technologies, Inc., and Fastar Ltd., Defendants-Cross · Southwall Technologies, Inc. v. Cardinal IG Co. · Innova/Pure Water, Inc. v. Safari Water Filtration Systems, Inc. · Personalized Media Communications, LLC v. International Trade Commission
Most-quoted passages
The sentences later courts lift from this opinion, ranked by how many decisions quote each — the parts of the opinion doing the work. These counts are smaller than the citation total above because most of the 66 citing decisions cite the case generally; a passage count includes only decisions quoting that exact language verbatim.
“[T]he use of functional language in a claim may “fail ‘to provide a clear-cut indication of the scope of subject matter embraced by the claim’ and thus can be indefinite.” Claim 7 of the '593 patent, however, is clearly limited to a pipelined processor possessing the recited structure and capable of performing the recited functions, and is thus not indefinite under IPXL Holdings.”
5 later decisions quote this exact passage · from the majority“7. A pipelined processor for executing instructions comprising: a conditional execution decision logic pipeline stage ...; the conditional execution decision logic pipeline stage performing a boolean algebraic evaluation of the condition code and said conditional execution specifier and producing an enable-write with at least two states, true and false; said enable-write when true enabling and when false disabling the writing of instruction results at said write pipeline stage; the conditional execution decision logic pipeline stage, when specified by the conditional execution specifier, determining the enable-write'-using the boole-an algebraic evaluation;”
1 later decision quote this exact passage · from the majority“A method of executing instructions in a pipelined processor comprising: [structural limitations of the pipelined processor]; the method further comprising: [method steps implemented in the pipe-lined processor].”
1 later decision quote this exact passage · from the majority
How this case has been treated — in progress
Whether each later court followed, distinguished, criticized, or overruled this decision. The treatment classification (task #35) runs highest-cited cases first and lights up here as it reaches this one.